The integration of hundreds of millions of circuit elements, such as transistors, on a single integrated circuit necessitates further dramatic scaling down or micro-miniaturization of the physical dimensions of circuit elements, including interconnection structures. Micro-miniaturization has engendered a dramatic increase in transistor engineering complexity, such as the inclusion of graded well-doping, epitaxial wafers, halo implants, tip implants, lightly doped drain structures, multiple implants for source/drain regions, silicidation of gates and source/drains, and multiple sidewall spacers, for example.
The drive for high performance requires high speed operation of microelectronic components requiring high drive currents in addition to low leakage, i.e., low off-state current, to reduce power consumption. Typically, the structural and doping parameters tending to provide a desired increase in drive current adversely impact leakage current.
Recently, metal gate electrodes have evolved for improving the drive current by reducing polysilicon depletion. In replacement metal gate processes, controlling gate open during the polishing step adversely impacts efforts to maintain a consistent gate height. This often necessitates increasing the incoming gate height has to be increased to compensate gate loss during planarization steps. However, the increased gate height causes undesirable effects such halo implant shadowing. Accordingly, a need exists for an improved methodology enabling the fabrication semiconductor devices comprising transistors with replacement metal gate electrodes.